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rev. 0 a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700www.analog.com fax: 781/326-8703 ? analog devices, inc., 2002 ADM1070 ?8 v hot swap controller functional block diagram v cc and reference generator over-under voltage detection circuit fault timer and control oscillator sense 0v v dd r1 r2 ?8v v ee uv/ov timer r drop 12v 16k v in v cc v ref en 100mv v in 45 a gate v ee r sense c load v out () * * optional timer capacitor ADM1070 q1 features allows safe board insertion and removal from a live C48 v backplane typically operates from C36 v to C80 v tolerates transients up to C200 v (limited by external components) accurate programmable linear current limit for in-rush control and short circuit protection programmable timeout in current limit limited consecutive retry: auto-restart after current limit timeout shutdown after seven consecutive auto restarts provides immunity from step induced current spikes default timing provided with no timer capacitor single pin undervoltage/overvoltage detection programmable operating voltage window programmable undervoltage/overvoltage time filter small 6-lead sot-23 package applications central office switching C 48 v distributed power systems negative power supply control hot board insertion electronic circuit breaker high availability servers programmable current limiting circuit C 48 v power supply modules g eneral description the ADM1070 is a negative voltage hot swap controller that allows a board to be safely inserted and removed from a live ?8 v backplane. the part achieves this by providing robust current limiting, protection against transient and nontransient short circuits and overvoltage and undervoltage conditions. the ADM1070 typically operates from a negative voltage of up to ?0 v and can tolerate transient voltages of up to ?00 v. in-rush current is limited to a programmable value by control- ling the gate drive of an external n-channel fet. the current limit can be controlled by the choice of the sense resistor, r sense . added control of the in-rush current is provided by an on-chip timer that uses pulsewidth modulation to allow the maximum current to flow for only 3% of the time. an autorestart occurs after a current limit timeout. after seven successive autorestarts, the fault will be latched and the part goes into shutdown with the result that the external fet is disabled until the power is reset. the ADM1070 also features single-pin undervoltage and over- voltage detection. the fet is turned off if a nontransient voltage less than the undervoltage threshold, typically ?6 v, or greater than the overvoltage threshold, typically ?7 v, is detected on the uv/ov pin. the operating voltage window of the ADM1070 is programmable and is determined by the ratio r1/r2. time filtering on the undervoltage and overvoltage detection and current limiting is programmable via the timer pin. an external capacitor connected between the timer pin and v ee determines the undervoltage/overvoltage time filter and the timeout in current limit. if the pin is tied to v ee , the time filter values and the current limit timeout revert to default figures. the ADM1070 is fabricated using bicmos technology for m ini- mal power consumption. the part is available in a small 6-lead sot-23 package.
rev. 0 ?2? ADM1070especifications parameter min typ max unit test conditions board supply (not connected directly to device) maximum voltage range e200 e48 e20 v limited by voltage capability of external components * typical operating voltage range e77 e48 e36 v r drop = 16 k ? v gate < 2 v, v ss > 11 v 30 k v gate < 2 v, v ss > 2 v sense pineecurrent sense analog current limit voltage (rising),v lim 90 100 110 mv i gate = 0 30 ?
rev. 0 ADM1070 ?3? parameter min typ max unit test conditions sense pineecurrent sense (continued) continuous short circuit time before latched 2100 2800 3500 ms timer pin tied to v ee shutdown, t short (v uvr < uv/ov < v ovf ) 1500 2000 2500 ms c timer = 470 pf (v uvr < uv/ov < v ovf ) * operating sense voltage range, v sop 0 0.11 v input current, i sense e500 +500 ja = 226.6 jc = 91.99
rev. 0 ?4? ADM1070 pin configuration top view (not to scale) 6 5 4 sense v in gate uv/ov timer ADM1070art 1 2 3 v ee pin function description pin no. mnemonic function 1 sense connection to external fet source voltage. a sense resistor is connected in the supply path between the sense pin and v ee , and the voltage across this resistor is monitored to detect current faults. this voltage is fed as an input to the linear current regulator. when it reaches 100 mv for a specified period, t on , the regulator reduces the gate voltage and drives the fet as a linear pass device. if current monitoring is not required, this feature can be turned off by shorting the sense pin and v ee together. 2v ee device negative supply voltage. this pin should be connected to the lower potential of the power supply. 3v in shunt regulated on-chip supply, nominally v ee + 12.3 v. this pin should be current fed through a dropper resistor that is connected to the higher potential of the power supply inputs. 4ti mer allows user control over timing functions by determining frequency of oscillator. fre- quency set by connecting external capacitor to v ee . tying pin directly to v ee causes oscillator to default to internally set value. 5 uv/ov input pin for overvoltage and undervoltage detection circuitry. the voltage appearing on the uv/ov pin is proportional to board supply and is determined by external resistors. when the voltage on uv/ov falls below the undervoltage threshold of 0.86 v, the gate pin is driven low. when the voltage appearing at the uv/ov pin rises above the overvoltage threshold of 1.97 v, the gate pin is also driven low. if the external resistor ratio of r1/r2 = 40 is used, then this gives an operating range of e36 v to e77 v. 6 gate output to external fet gate drive. controlled by linear current regulator. the gate is driven low if an overvoltage or undervoltage fault occurs or if a current fault lasts for longer than the time, t on . when in linear regulation, the gate pin voltage is controlled as part of the servo loop. no external compensation is required. when the fet is fully enhanced and the load capaci tance has been charged, the gate pin reaches a high level of typically 12 v.
rev. 0 ADM1070 ?5? temperature e c 2.0 0 e50 e35 i in e ma e20 e5 10 25 40 55 70 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 85 tpc 1. i in vs. temperature v in e v 1000 02 i in e ma 46810 12 14 100 10 1 16 0.1 +85 c +25 c e40 c tpc 2. i in vs. v in temperature e c e45 r z e v 10 9 8 7 6 5 4 3 2 e35 e25 e15 e5 5 15 25 35 45 55 65 75 85 tpc 3. r z vs. temperature temperature e c e45 v z e v 14.5 14.0 13.5 13.0 12.5 12.0 11.5 11.0 e35 e25 e15 e5 5 15 25 35 45 55 65 75 85 tpc 4. v z vs. temperature temperature e c e50 v lko e v 12 11 10 9 8 6 e35 e20 e5 10 25 40 55 70 85 7 tpc 5. undervoltage lockout, v lko vs. temperature temperature e c e50 v cb e mv 100 95 85 80 70 e35 e20 e5 10 25 40 55 70 85 75 60 65 rising falling 90 tpc 6. circuit breaker current limit voltage, v cb vs. temperature t ypical performance characteristicse
rev. 0 ?6? ADM1070 temperature e c e50 v acl e mv 120 115 110 105 100 90 e35 e20 e5 10 25 40 55 70 85 95 80 85 tpc 7. analog current limit voltage, v acl vs. temperature temperature e c 150 100 e50 e35 v fcl e mv e20 e5 10 25 40 55 70 145 140 135 130 125 120 115 110 105 85 tpc 8. fast current limit voltage, v fcl vs. temperature temperature e c 60 e50 e35 i gate e a e10 5 25 4 05570 55 50 45 85 30 40 35 tpc 9. i gate (source) vs. temperature temperature e c e50 i gate e ma 60 50 40 30 20 0 e35 e20 e5 10 25 40 55 70 85 10 tpc 10. i gate (fcl, sink) vs. temperature (v gate = 9 v) temperature e c e50 v gate e v 14.0 13.5 13.0 12.5 12.0 11.0 e35 e20 e5 10 25 40 55 70 85 11.5 10.0 10.5 tpc 11. v gate vs. temperature temperature e c e40 v gatel e mv 50 40 30 20 10 0 e30 e20 e10 0 10 20 30 40 50 60 70 80 90 tpc 12. v gatel vs. temperature
rev. 0 ADM1070 ?7? v gate e v 50 0 01 i gate e ma 23 45 40 35 30 25 20 15 10 5 456789 10 11 12 tpc 13. i gate vs. v gate temperature e c 4.0 e50 e35 timer threshold e v e20 e5 10 25 40 55 3.5 3.0 2.5 70 0 1.0 0.5 2.0 1.5 85 high low tpc 14. high and low timer thresholds vs. temperature temperature e c e50 v uv e v 1.00 0.95 0.90 0.85 0.75 e35 e20 e5 10 25 40 55 70 85 0.80 uv low uv high tpc 15. uv threshold vs. temperature temperature e c e50 v ov e v 2.05 2.00 1.95 1.90 1.80 e35 e20 e5 10 25 40 55 70 85 1.85 ov high ov low tpc 16. ov threshold vs. temperature temperature e c 10 0 e50 e35 i sense e a e20 e5 10 25 40 55 70 9 8 7 6 5 4 3 2 1 85 tpc 17. i sense vs. temperature (v sense = 50 mv) v sense e v ee e60 120 i sense e a e40 e20 0 20 40 60 80 100 e2.0 e1.6 e1.2 e0.8 e0.4 0 0.4 0.8 1.2 1.6 2.0 tpc 18. i sense vs. (v sense ? v ee )
rev. 0 ?8? ADM1070 temperature e c 4.0 e50 e35 t por e ms e20 e5 10 25 40 55 3.5 3.0 2.5 70 0 1.0 0.5 2.0 1.5 85 timer e> v ee timer e> 470pf tpc 19. por delay vs. temperature - temperature e c 4.0 2.0 0 e50 e35 t flt e ms e20 e5 10 25 40 55 70 85 3.5 3.0 1.0 0.5 2.5 1.5 timer e> v ee timer e> 470pf tpc 20. voltage fault filter time vs. temperature temperature e c 20 0 e50 e35 t on e ms e20 e5 10 25 40 55 70 18 16 14 12 10 8 6 4 2 85 timer e> v ee timer e> 470pf tpc 21. maximum current limit on time vs. temperature temperature e c 5.0 0 e50 e35 pwm e % e20 e5 10 25 40 55 70 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 85 tpc 23. current limit pwm vs. temperature temperature e c 5.0 0 e50 e35 t short e sec e20 e5 10 25 40 55 70 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 85 timer e> v ee timer e> 470pf tpc 22. continuous short circuit time before shutdown vs. temperature
rev. 0 ADM1070 C9C functional description hot circuit insertion inserting circuit boards into a live ?8 v backplane can cause large transient currents to be drawn as the board capacitance charges up. these transient currents can cause glitches on the system power supply and can permanently damage components on the board. the ADM1070 is designed to control the manner in which a board? supply voltage is applied so that harmful transient currents do not occur and the board can be safely inserted or removed from a live backplane. undervoltage, overvoltage, and overcurrent pro- tection are other features of the part. the ADM1070 ensures that the input voltage is stable and within tolerance before being applied to the dc-to-dc converter, which generates the low voltage levels required to power the on-board logic. one such converter is the artesyn exq50. go to www.artesyn.com for more information. artesyn exq50 c load ADM1070 live backplane 0v ?8v r sense plug-in board r1 r2 v in + v in v out + v ou t trim fet figure 1. topology initial startup the ADM1070 hot swap controller normally resides on a remov- able circuit board and controls the manner in which power is applied to the board upon connection. this is achieved using a fet, q1, in the power path. by controlling the gate voltage of the fet, the surge of current to charge load capacitance can be limited to a safe value when the board makes connection. note that the ADM1070 can also reside on the backplane itself, and perform the same function from there. tmer ADM1070 r1 r2 uv/ov gate sense v ee q1 r sense c load v out r drop 16k v in 0v ?8v live backplane figure 2. circuit board connection figure 2 shows how a plug-in module containing the ADM1070 makes connection to the backplane supply. when the board is inserted, the ?8 v and 0 v lines connect. this powers up the device with the voltage on v in exceeding v lko . when the voltage at the uv/ov pin exceeds undervoltage rising threshold (v uvr ) of 0.91 v, it is now inside the operating volt- age window. it must stay inside this window for the duration of the power-on reset delay time, t por , which is dependent on the value of c t . when the device detects that the supply voltage is valid, it ramps up the gate voltage until the fet turns on and the load current increases. the ADM1070 monitors the level of the current flowing through the fet by sensing the voltage across the external sense resistor, r sense . when the sense voltage reaches 100 mv, the gate pin is actively controlled, limiting the load current. in this way, the maximum current permitted to flow through the load is set by the choice of r sense . if a change in the level of the supply voltage causes uv/ov to fall below the undervoltage falling threshold of v uvf , or rise above the overvoltage rising threshold of v ovr , then the gate drive will be disabled. board removal if the board is removed from a card cage, the voltage at the uv/ov pin falls to zero (i.e., outside operating range) and the gate drive is deasserted, turning off the fet. controlling the current the ADM1070 features a current limiting function that protects against short circuits or excessive supply currents. the flow of current through the load is monitored by measuring the voltage across the sense resistor, which is connected between the sense and v ee pins. there are three different types of protection of fered: 1. if the voltage across the sense resistor exceeds the circuit breaker limit voltage of 88 mv (rising) for the current limit on time (t limiton ), then a current fault has occurred and the pwm cycle begins. the fet current is linearly controlled at a maximum of 100 mv/r sense (via the gate drive) during t limiton (see next section). the gate is then disabled for the duration t off . this pwm ratio, which will always be 3%, is given by t on /t off . a unique feature of the ADM1070 is the limited consecutive retry function. an internal fault counter keeps track of the number of successive pwm cycles that occur. the fault counter is incremented after every fault is detected. if the ADM1070 detects seven consecutive current faults, it is ap par- ent that the fault is not a temporary one and the device latches itself off. the fault counter is cleared if a new t on timeout does not occur within 2 t off of the previous t limiton timeout.
rev. 0 ?10? ADM1070 2. if a voltage between the sense and v ee pins increases to 100 mv (the analog current limit voltage) during t limiton , then the ADM1070 takes action to reduce this current to a safer level. the internal analog current limit loop dynami- cally adjusts the gate drive, keeping the load current at the 100 mv/r sense level. the fet now acts as a current source, limiting the load current to the level set by the value of the sense resistor. the sense voltage is also above the circuit breaker limit volt age, so the limited consecutive retry function is still operational. if the current fault is not cleared (sense resistor voltage brought below 79 mv) after seven consecutive faults, then the device is latched off. 3. if a serious short circuit occurs on the load side, the e48 v supply can cause massive currents to flow very quickly. be cause of this, the gate voltage must be reduced quickly to prevent a catastrophic failure. if the ADM1070 detects a voltage greater than the fast current limit voltage (126 mv) across the sense resistor, it is apparent that a serious short circuit is present and the load current must be reduced as quickly as possible. the fast current limit loop takes over and pulls gate low much faster than in the previous case. sense resistor the ADM1070?s current limiting function can operate at differ- ent current levels. the sense resistor is inserted between the v ee and sense pins, and a current fault occurs whenever the voltage across the sense resistor is greater than 100 mv for longer than the on time, t limiton . the current limit is determined by selec- tion of the sense resistor, r sense . table i shows how the maximum allowable load current (i load(max) ) and the mini- mum and maximum in-rush currents (i limit(min) ) and i limit(max) ) are related to the value of r sense . r sense i load(max) i limit(min) i limit(max) (m ) (a) (a) (a) 5 12.0 18.0 22.0 10 6.0 9.0 11.0 15 4.0 6.0 7.3 18 3.3 5.0 6.1 22 2.7 4.1 5.0 33 1.8 2.7 3.3 47 1.3 1.9 2.3 51 1.2 1.7 2.2 68 0.9 1.3 1.6 75 0.8 1.2 1.5 90 0.7 1.0 1.2 shunt regulator a shunt regulator shunts the ADM1070 v in pin. power is derived from the e48 v supply through the combination of an internal zener diode and an external shunt resistor, r drop . table ii shows the operational voltage range and power dissipa- tion for different values of r drop . note that 16 k ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
rev. 0 ADM1070 ?11? undervoltage/overvoltage detection the ADM1070 incorporates single-pin overvoltage and undervoltage detection with a programmable operating voltage window. when the voltage on the uv/ov pin rises above the ov rising threshold or falls below the uv falling threshold, a fault signal is generated that disables the linear current regulator and results in the gate pin being pulled low. the voltage fault signal is time filtered so that faults of duration less than the uv/ ov glitch filter time, t flt , do not force the gate drive low (t flt is set by the choice of external capacitor c t , see table iii). the filter operates only on the faulting edge (i.e., on a high to low transition on the undervoltage monitor and on a low to high transition on the overvoltage monitor). the analog com- parators have some hysteresis to provide smooth switching of the comparator inputs. if the voltage on uv/ov goes out of range (i.e., below 0.86 v or above 1.97 v) gate is pulled low. if the uv/ov voltage subse quently re-enters the operating voltage window, the ADM1070 will restore the gate drive. the overvoltage and undervoltage thresholds are: uv turning on = 0.91 v uv turning off = 0.86 v ov turning on = 1.97 v ov turning off = 1.93 v the undervoltage/overvoltage levels are determined by selection of the resistor ratio r1/r2, (see table i). these two resistors form a resistor divider that generates the voltage; at the uv/ov pin, which is proportional to the supply voltage. by choosing this ratio carefully, the ADM1070 can be programmed to apply the supply voltage to the load only when it is within specific thresholds. for example, for r1 = 39 k ? ? ? ? ? ? ? ?
rev. 0 ?12? ADM1070 functionality and timing live insertion the timing waveforms associated with the live insertion of a plug-in board using the ADM1070 are shown in the following figures. when the board connects the gnd-v ee potential climbs to 48 v. as this voltage is applied, the voltage at the v in pin ramps above the undervoltage lockout (v lko ) of 8.5 v to a constant 12.3 v and is held at this level with the shunt resistor and external resistor combination at the v in p in. when uv/ov crosses the undervoltage rising threshold of 0.91 v, it is now inside the operating voltage window and the e48 v supply must be applied to the load. after a time delay, t por , the ADM1070 begins to ramp up the gate drive. when the voltage on the sense pin reaches 100 mv (the analog current limit) the gate drive is held constant. when the board capaci- tance is fully charged, the sense voltage begins to drop below the analog current limit voltage and the gate voltage is free to ramp up further. the gate voltage eventually reaches its maxi- mum value of 12.3 v (as set by v in ). gnd-v ee t por v in uv/ov gate sense v out v lko v uvr figure 5. timing waveforms associated with a live insertion event gate sense v out ch2 5.00v ch1 10.00v ch3 100mv m 500 s ch1 2.8v t t figure 6. start-up sequence overvoltage and undervoltage the waveforms for an overvoltage glitch are shown below. when uv/ov glitches above the overvoltage rising threshold of 1.97 v, an overvoltage condition is detected and the gate volt- age is pulled low. uv/ov begins to drop a back toward the operating voltage window and the gate drive is restored when the overvoltage falling threshold of 1.93 v is reached. figure 7 illustrates the ADM1070?s operation in an overvoltage situation. gate sense v uv/ov ch2 10.00v ch1 1.00v ch3 100mv m 200 s ch3 1.96v t t figure 7. timing waveforms associated with an overvoltage glitch an undervoltage glitch is dealt with in a similar way. when v uv/ov falls below the undervoltage falling threshold of 0.86 v, the gate voltage is pulled low. if uo/uv subsequently rises back above the undervoltage rising threshold of 0.91 v, then the gate voltage is restored. figure 8 illustrates the ADM1070?s operation in an undervoltage situation. gate sense v uv/ov ch2 10.0v ch1 1.00v ch3 100mv m 200ms figure 8. timing waveforms associated with an undervoltage glitch
rev. 0 ADM1070 ?13? current fault plots some timing waveforms associated with current over faults are shown in the following figures. figure 9 shows how a current glitch (of approximately 500
rev. 0 ?14? ADM1070 figure 13 shows the behavior of ADM1070 when a temporary current fault occurs followed by a permanent current fault. when the first overcurrent fault occurs, the first 100 mv spike on the sense line can be seen. during the t off time, this current fault corrects itself. after this time period, a no fault condition is detected and the limited consecutive counter is reset. gate is reasserted. when the overcurrent fault returns permanently, the limited consecutive retry counter detects seven consecutive faults and the part latches off. gate sense 5.00v ch2 100mv m 500ms ch1 b n t figure 13. illustration of the pwm ratio (t on /t off ) in this way, the ADM1070 prevents nuisance shutdowns from transient shorts of up to three seconds (typically), but will provide latched shut-down protection from permanently shorted loads. kelvin sense resistor connection when using a low value sense resistor for high current measure- ment, the problem of parasitic series resistance can arise. the lead resistance can be a substantial fraction of the rated resis- tance, making the total resistance a function of lead length. this problem can be avoided by using a kelvin sense connec tion. this type of connection separates the current path through the resistor and the voltage drop across the resistor. figure 14 shows the correct way to connect the sense resistor between the sense and v ee pins of the ADM1070. kelvin sense traces current flow from load current flow to e48v backplane sense resistor sense v ee ADM1070 figure 14. kelvin sensing with the ADM1070 uv/ov as enable pin connecting an open collector output to the uv/ov pin means that a ttl signal can be used to disable the part. in figure 15, the open collector output connects to en en n e e ene ee ene e
rev. 0 ADM1070 ?15? outline dimensions 6-lead plastic surface-mount package [sot-23] (rt-6) dimensions shown in millimeters 1 3 4 5 2 6 2.90 bsc pin 1 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 0.22 0.08 0.60 0.45 0.30 10 0 0.50 0.30 0.15 max 1.30 1.15 0.90 seating plane 1.45 max compliant to jedec standards mo-178ab
c02843??/02(0) printed in u.s.a. ?6

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